Course Objectives

For ELEC 370
Digital Logic Design

The objectives for this course are for the students to:

• demonstrate knowledge of practical aspects of digital components including setup and hold time in flip-flops and fan-in, fan-out, and noise margin in logic gates;
  
• create minimal realizations of single and multiple output Boolean functions;
  
• design and analyze combinational circuits using medium scale integrated (MSI) components, including arithmetic logic units;
  
• demonstrate knowledge of clocking issues within synchronous systems;
  
• derive state diagrams and state transition tables for synchronous finite state machines (FSMs);
  
• apply strategies for state minimization, state assignment, and implementation of synchronous FSMs;
  
• demonstrate the ability to implement FSMs using programmable logic devices (PLDs), including how to partition a FSM for a given PLD;
  
• demonstrate knowledge of hazards and race conditions generated within asynchronous FSMs; and
  
• design digital circuits using a Hardware Description Language (HDL).